Method of manufacturing a computer device
US10820409B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2020 |
| Grant date | Oct 27, 2020 |
| Priority date | — |
| Expiry date | Feb 28, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0162
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to a first aspect, there is provided a computer structure comprising a first silicon substrate and a second silicon substrate. Computer circuitry configured to perform computing operations is formed in the first silicon substrate, which has a self-supporting depth and an inner facing surface. A plurality of distributed capacitance units are formed in the second silicon substrate, which has an inner facing surface located in overlap with the inner facing surface of the first substrate and is connected to the first substrate via a set of connectors arranged extending depthwise of the structure between the inner facing surfaces. The inner facing surfaces have matching planar surface dimensions. The second substrate has an outer facing surface on which are arranged a plurality of connector terminals for connecting the computer structure to a supply voltage. The second substrate has a smaller depth than the first substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.