Patent · US Active

Reference voltage circuit and semiconductor device

US10824181B2 · kind B2 · utility

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10Claims
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Assignee

Inventor

Key dates

Filing dateJan 27, 2020
Grant dateNov 3, 2020
Priority date
Expiry dateJan 27, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/84
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

A reference voltage circuit includes a first MOS transistor pair having a first MOS transistor of an enhancement type having a gate and a drain connected to each other, and a second MOS transistor of a depletion type having a gate connected to a source of the first MOS transistor, a source connected to the drain of the first MOS transistor, and a drain connected to an output terminal; and a second MOS transistor pair having a third MOS transistor of an enhancement type having a gate and a drain connected to the output terminal and a source connected to the source of the second MOS transistor, and a fourth MOS transistor of a depletion type having a gate connected to the source of the third MOS transistor and a source connected to the output terminal. All the MOS transistors operate in a weak inversion region.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.