Flash-based accelerator and computing device including the same
US10824341B2 · kind B2 · utility
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Key dates
| Filing date | Jun 16, 2016 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Jun 16, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a flash-based accelerator, a flash-based non-volatile memory stores data in pages, and a buffer subsystem stores data in words or bytes. An accelerator controller manages data movement between the flash-based non-volatile memory and the buffer subsystem. A plurality of processors processes data stored in the buffer subsystem.A network integrates the flash-based non-volatile memory, the buffer subsystem, the accelerator controller, and the plurality of processors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.