Disambiguation of error logging during system reset
US10824493B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2017 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Mar 4, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0787
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mechanism for disambiguation of error logging during a warm reset is disclosed. A system agent detects an error occurring during bootstrapping of a processor package. The error occurs prior to initiation of a machine check system. A wide pulse event is initiated to signal a wide pulse register to store a wide pulse time stamp counter value. The wide pulse event also signals a lap register to store a lap time stamp counter value. The wide pulse register maintains the wide pulse time stamp counter value during a warm reset, and the lap register clears the lap time stamp counter value during the warm reset. The system agent obtains the wide pulse time stamp counter value and the lap time stamp counter value after bootstrapping is complete to determine an order of occurrence of the error relative to the warm reset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.