Systems and methods for providing continuous memory redundancy, availability, and serviceability using dynamic address space mirroring
US10824524B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 2, 2018 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Nov 13, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An information handling system may include one or more processors, a memory system communicatively coupled to the one or more processors, and a program of instructions embodied in non-transitory computer readable media and configured to, when read and executed by the one or more processors, create operating system level-mirroring of address spaces for data associated with one or more processes executing on the one or more processors and dynamically reallocate address spaces used for mirroring of the data for a process of the one or more processes from a first address space to a second address space responsive to a determination that a number of correctable bit errors of a memory page associated with the first address space exceeds a threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.