Semiconductor device
US10824580B2 · kind B2 · utility
1Cited by
11References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2017 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Oct 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10159
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a plurality of memory chips arranged in a line on a substrate, and a bus connected to the plurality of memory chips and configured to sequentially supply an electrical signal to the plurality of memory chips in accordance with a fly-by topology. An order in which the electrical signal is supplied to the plurality of memory chips is different from an order in which the plurality of memory chips is arranged in the line on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.