Shift register unit, shift register circuit, driving method therefor, and display panel
US10825397B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 21, 2018 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Mar 28, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a shift register unit. The shift register unit includes a first input circuit configured to transmit a first voltage signal to a pull-up node, a pull-up circuit configured to transmit a first clock signal to a signal output terminal, a first pull-down control circuit configured to transmit a second clock signal to a pull-down node, a second pull-down control circuit configured to transmit a second voltage signal to the pull-down node, a pull-up control circuit configured to transmit the second voltage signal to the pull-up node, a pull-down circuit configured to transmit the second voltage signal to the signal output terminal, and a holding circuit configured to maintain the pull-up node at a low level and/or maintain the pull-down node at a high level under control of a second input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.