Semiconductor structure and fabrication method thereof
US10825735B2 · kind B2 · utility
2Cited by
7References
17Claims
0Family size
Assignees
Inventor
Key dates
| Filing date | Aug 30, 2018 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Aug 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76229
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure and a method for fabricating the semiconductor structure are provided. The method includes providing a substrate. The substrate includes an active region and a blank region disposed adjacent to the active region. The method also includes forming a fin material layer on the substrate. Further, the method includes forming a plurality of fins on the active region, and a plurality of dummy fins on the blank region by etching the fin material layer. A spacing between a fin and an adjacent dummy fin is greater than a spacing between adjacent fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.