Patent · US Active

Three-dimensional semiconductor device and method of fabricating same

US10825868B2 · kind B2 · utility

0Cited by
1References
20Claims
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Assignee

Inventors

Key dates

Filing dateDec 27, 2018
Grant dateNov 3, 2020
Priority date
Expiry dateDec 27, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10N70/841

Abstract

In one aspect, a method for manufacturing a three-dimensional (3D) semiconductor device is disclosed. It includes providing a vertical stack of alternating layers of a first layer type and a second layer type, and providing a first trench and a second trench adjacent the vertical stack. The first trench and the second trench can define a fin. The method further can include recessing the first layer type to form recesses extending into the fin, providing a first electrode in individual ones of the recesses, and providing a second electrode in the first trench and the second trench. The method further can include providing, for individual ones of the recesses, a lateral stack including a memory element, a middle electrode, and a selector element. The lateral stack can extend between the first electrode and the second electrode, thereby forming a memory device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.