Display panel
US10825886B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2020 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Jan 31, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/65
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel includes: a substrate including: a first region; a second region; a non-display area surrounding the first region and the second region; and a display area surrounding the non-display area; a plurality of pixels in the display area; a plurality of wirings configured to supply signals to the plurality of pixels; a load matching area connected to first wirings of the wirings, the load matching area including load units in the non-display area; and a dummy area including a plurality of dummy units spaced apart from the load units in the non-display area, wherein each of the load units comprises a load semiconductor layer, a first load conductive layer, and a second load conductive layer which at least partially overlap each other with an insulating layer therebetween, and the load semiconductor layer is connected to the second load conductive layer via a first contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.