Apparatus and method for RF isolation in a packaged integrated circuit
US10826195B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2018 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Aug 25, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Illustrative embodiments significantly improve RF isolation in a packaged integrated circuit by separating the pins/pads associated with multiple RF channels from one another and also from pins/pads associated with digital circuits. Specifically, in certain exemplary embodiments, the integrated circuit is configured with the pins/pad for the digital circuits on a first edge of the chip, the pins/pads for common RF signals on a second edge of the chip opposite the first edge, and the pins/pads for the individual RF channels on third and fourth edges of the chip. The pins/pads associated with each RF channel may include multiple pins/pads (an “RF group”) and may have a central RF pin/pad with a ground pin/pad on each side of the central RF pin/pad. One or more ground pins/pads may be placed between adjacent RF groups on a given edge of the chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.