Bias circuit
US10826438B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2018 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Feb 13, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/451
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A bias circuit includes a buffer, a temperature compensation circuit, and a feedback circuit. The buffer includes a first transistor. A first terminal of the first transistor and a second terminal of the first transistor are electrically connected with a first voltage source. A third terminal of the first transistor is electrically connected with an external amplifier. The temperature compensation circuit includes a second transistor and a temperature compensation component. A first terminal of the second transistor is electrically connected with the third terminal of the first transistor. Two terminals of the temperature compensation component are electrically connected with a second terminal of the second transistor and the first voltage source respectively. A third terminal of the second transistor is grounded. The feedback circuit is electrically connected with the first terminal of the first transistor and the second terminal of the second transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.