Image processing apparatus
US10827102B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 1, 2019 |
| Grant date | Nov 3, 2020 |
| Priority date | — |
| Expiry date | Aug 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image processing apparatus, which includes a first physical computing circuit, configured to receive a plurality of first analog signals output by an image sensor, and perform a convolution operation on the plurality of first analog signals to obtain a second analog signal. The plurality of first analog signals are in a one-to-one correspondence with a plurality of pieces of pixel data of a to-be-recognized image. The first physical computing circuit comprises at least one multiplication circuit array and at least one subtraction circuit, the at least one multiplication circuit array is in a one-to-one correspondence with the at least one subtraction circuit, a multiplication circuit in each multiplication circuit array comprises a differential pair transistor, each multiplication circuit array implements the convolution operation on the plurality of first analog signals using a plurality of multiplication circuits and a corresponding subtraction circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.