Carriers for microelectronics fabrication
US10829412B2 · kind B2 · utility
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5References
23Claims
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Key dates
| Filing date | Jun 20, 2019 |
| Grant date | Nov 10, 2020 |
| Priority date | — |
| Expiry date | Jun 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Carriers for microelectronics fabrication may include a strengthened substrate formed from glass or glass-ceramic having an average thickness greater than 1.0 mm and less than or equal to 2.0 mm. The strengthened glass substrate may have a single-side surface area greater than or equal to 70,000 mm2. The substrate may also have a compressive stress greater than or equal to 200 MPa and a depth of layer from about 50 μm to about 150 μm. The substrate may further include a tensile stress region having a stored elastic energy of less than 40 kJ/m2 providing for a flat fragmentation factor of less than or equal to 5.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.