Patent · US Active

Error detecting device and error detecting method for detecting failure of hierarchical system, computer readable recording medium, and computer program product

US10831579B2 · kind B2 · utility

1Cited by
8References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 21, 2019
Grant dateNov 10, 2020
Priority date
Expiry dateJun 20, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F16/2455
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An error detecting device for detecting failure of a hierarchical system comprises a detected signal receiving interface and a processor. The detected signal receiving interface receives a parent failure event occurring in the hierarchical system. If the processor diagnoses that the parent failure event is in a failure state, the detected signal receiving interface receives a first child failure event occurring in the hierarchical system. If the processor diagnoses that the parent failure event is not in the failure state, the detected signal receiving interface receives a second child failure event occurring in the hierarchical system. The parent failure event depends on the first child failure event. The second child failure event depends on the parent failure event. The processor sequentially diagnoses until the detected signal receiving interface receives one of the failure events at a bottom level in a binary search tree structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.