Semiconductor device including an MIS structure
US10833166B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2017 |
| Grant date | Nov 10, 2020 |
| Priority date | — |
| Expiry date | Jul 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has an MIS structure that includes a semiconductor layer, a gate insulating film on the semiconductor layer, and a gate electrode on the gate insulating film. The gate insulating film has a layered structure that includes a base SiO2 layer and a high-k layer on the base SiO2 layer and containing Hf. The gate electrode has a portion made of a metal material having a work function of higher than 4.6 eV, the portion being in contact with at least the high-k layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.