Virtual radar array having reduced size
US10833421B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2019 |
| Grant date | Nov 10, 2020 |
| Priority date | — |
| Expiry date | May 8, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B7/08
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A circuit board in an electronic device includes a first set of transmit antennas and a first set of receive antennas arranged along an azimuth direction, and a second set of transmit antennas and a second set of receive antennas arranged along a direction that includes components in the azimuth direction and an elevation direction. Moreover, separations between adjacent transmit antennas in the first or second set of transmit antennas along the azimuth direction may be greater than one half of the fundamental wavelength. Furthermore, separations between adjacent receive antennas in the first or second set of receive antennas along the azimuth direction may equal one half of the fundamental wavelength. Additionally, adjacent antennas in the second set of transmit antennas and the second set of receive antennas may be partially offset from each other and partially overlap with each other along the elevation direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.