Patent · US Active

Circuits and methods for time-delay to digital converters

US10833694B2 · kind B2 · utility

0Cited by

1References

10Claims

0Family size

Assignee

The Trustees of Columbia University in the City of New York · US

Inventors

Daniel de Godoy Peixoto · Austin, US
Xiaofan Jiang · West Lafayette, US
Peter R. Kinget · Summit, US

Key dates

Filing date	Apr 8, 2019
Grant date	Nov 10, 2020
Priority date	—
Expiry date	Apr 8, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH03M1/50
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

In accordance with some embodiments, polarity-coincidence, adaptive time-delay estimation (PCC-ATDE), mixed-signal techniques are provided. In some embodiments, these techniques use 1-bit quantized signals and negative-feedback architectures to directly determine a time-delay between signals at analog inputs and convert the time-delay to a digital number.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.