Introducing latency and delay for test or debug purposes in a SAN environment
US10833952B2 · kind B2 · utility
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14References
9Claims
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Key dates
| Filing date | Jan 13, 2017 |
| Grant date | Nov 10, 2020 |
| Priority date | — |
| Expiry date | Aug 4, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/1097
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Simulating latency in a network environment. A device sends a latency request. The device receives a latency support confirmation. The device builds an I/O frame. The I/O frame comprises a latency simulating bit and a latency duration. Based on the latency simulating bit and the latency duration, the device holds the I/O frame. The device sends the I/O frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.