Printed circuit boards with non-functional features
US10842017B2 · kind B2 · utility
1Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2019 |
| Grant date | Nov 17, 2020 |
| Priority date | — |
| Expiry date | Jan 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09463
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multi-layer PCB has conductive vias (134) passing through multiple layers. A layer may have a conductive non-functional feature (710) physically contacting a via but not surrounding the via, to make the PCB more resistant to thermal stresses while, at the same time, reducing the parasitic capacitance compared to a prior art non-functional pad (310n).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.