RPMC flash emulation
US10846438B2 · kind B2 · utility
0Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 4, 2019 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Jul 14, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/127
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A controller includes a host interface and a processor. The host interface is configured for communicating with a host. The processor is configured to receive from the host, via the host interface, instructions for execution in a Non-Volatile Memory (NVM), to identify among the instructions an instruction, which pertains to a secure monotonic counter and is intended for execution in an NVM having a secure monotonic counter embedded therein, and to execute the identified instruction, and respond to the host responsively to the instruction, instead of the NVM.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.