Semiconductor device having a stacked electrode with an electroless nickel plating layer
US10847614B2 · kind B2 · utility
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4References
16Claims
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Key dates
| Filing date | Jun 24, 2019 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Jun 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/441
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including: a semiconductor element; and a first electrode formed on a first surface of the semiconductor element. The first electrode has a stacked structure including a first electroless Ni plating layer. The first electroless Ni plating layer contains nickel (Ni) and phosphorus (P) as a composition. A phosphorus (P) concentration of the first electroless Ni plating layer is 2.5 wt % to 6 wt % inclusive, and a crystallization rate of Ni3P in the first electroless Ni plating layer is 0% to 20% inclusive.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.