Semiconductor device with a well region
US10847621B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 2019 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Apr 4, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/441
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Supposing x is defined as a position of an end of a depletion layer extending when a rated voltage V [V] is applied to a rear surface electrode, W1 is defined as a distance between the position x and an outer peripheral edge of a surface electrode in an outer peripheral direction, W2 is defined as a distance between the position x and an outer peripheral edge of a field insulating film in the outer peripheral direction, t [μm] is defined as a film thickness t [μm] of the field insulating film, a layout of a terminal part is defined so that an electrical field in the field insulating film at the position x expressed as W2V/t(W1+W2) is 3 MV/cm or smaller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.