Reducing crosstalk from flux bias lines in qubit devices
US10847705B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2018 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Feb 15, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure describe two approaches to providing flux bias line structures for superconducting qubit devices. The first approach, applicable to flux bias line structures that include at least one portion that terminates with a ground connection, resides in terminating such a portion with a ground connection that is electrically isolated from the common ground plane of a quantum circuit assembly. The second approach resides in providing a SQUID loop of a superconducting qubit device and a portion of the flux bias line structure over a portion of a substrate that is elevated with respect to other portions of the substrate. These approaches may be used or alone or in combination, and may improve grounding of and reduce crosstalk caused by flux bias lines in quantum circuit assemblies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.