Methods for reducing data errors in transceiving of a flash storage interface and apparatuses using the same
US10848263B2 · kind B2 · utility
2Cited by
11References
12Claims
0Family size
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Key dates
| Filing date | Jun 20, 2018 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Dec 6, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/38
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention introduces a method for reducing data errors in transceiving of a flash storage interface, performed by a processing unit of a first side, comprising: continuously monitoring data frames and/or control frames from a second side; and triggering a TX (transmission) data rate adjustment when information of the data frame and/or the control frame indicates that the lowest layer of the second side detects errors from received data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.