Phase interpolator
US10848299B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 27, 2019 |
| Grant date | Nov 24, 2020 |
| Priority date | — |
| Expiry date | Dec 27, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00052
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A phase interpolator includes a phase adjusting circuit. The phase adjusting circuit includes a first phase adjusting module and a second phase adjusting module, the first phase adjusting module outputs a first clock signal, and the second phase adjusting module outputs a second clock signal; the first phase adjustment module and the second phase adjustment module are connected in parallel to output an interpolation signal. Through the first phase adjustment module and the second phase adjustment module the first clock signal and the second clock signal with the same frequency and different phases are mixed in proportion by adopting a voltage mode to generate an interpolation so as to achieve the purpose of phase adjustment, and meanwhile, the circuit can be carried out under lower voltage, so that the power consumption of the phase adjusting circuit is further reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.