Patent · US Active

System and method to secure FPGA card debug ports

US10852352B2 · kind B2 · utility

0Cited by

0References

17Claims

0Family size

Assignee

Dell Products L.P. · US

Inventors

Johan Rahardjo · Austin, US
Pavan Kumar Gavvala · Kanchinakote, IN

Key dates

Filing date	Oct 25, 2018
Grant date	Dec 1, 2020
Priority date	—
Expiry date	Aug 16, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06F21/85
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments are described for securing access to a debug port of an FPGA (Field Programmable Gate Array) card installed within an IHS (Information Handling System). A remote access controller determines the status of the FPGA card debug port via a query to a management controller of the FPGA card. The remote access controller generates a passcode for the debug port and disables the debug port via a message to the management controller. The management controller detects a request, that includes a requestor password, for access to the debug port. The remote access controller authorizes the requestor's access to the debug port if the requestor password matches the generated passcode. The remote access controller disables the debug port upon each power cycle of the FPGA card or upon detecting removal of a device from the debug port.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.