Patent · US Active

Updating inference graph absent node locking

US10853149B2 · kind B2 · utility

0Cited by
4References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 19, 2015
Grant dateDec 1, 2020
Priority date
Expiry dateOct 23, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06N5/04
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Example implementations relate to updating an inference graph absent node locking. For example, a processor executing a first thread may receive a first task for updating a node of an inference graph stored by a storage device accessible to a second thread, the first task being assigned during a first iteration of a graph update loop. Absent locking the node from access by the second thread, the processor may generate a value for the node and update the node with the value. Based on detecting that each node of the inference graph has been updated, the processor may continue with a second iteration of the graph update loop.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.