Method of, and apparatus for, testing computer hardware and software
US10853229B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2017 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Oct 4, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/368
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for generating an automated test configured to test a system under test. The system under test has a plurality of operational states, at least one operational state having one or more executable actions associated therewith operable to execute predetermined operations and/or transition the system under test between operational states. The method includes the steps of: defining a model of the system under test comprising a plurality of model states; defining one or more selectable model actions; associating one or more test description sections with one or more model actions; selecting a sequence of model actions; and utilising the test description sections associated with the selected sequence of model actions to define a sequence of operation commands for execution on the system under test as an automated test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.