Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices
US10853269B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2016 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Apr 13, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A secure demand paging system including a secure internal memory, an external non-volatile memory having encrypted and integrity-protected code pages, an external volatile memory for swap pages and a processor coupled to said secure internal memory and to said external non-volatile memory and operable to decrypt and verify the integrity of the code pages thereby to transfer code pages to said secure internal memory directly from said external non-volatile memory bypassing said external volatile memory in respect of the code pages, and to swap out and swap in the swap pages between secure internal memory and said external volatile memory bypassing said external non-volatile memory in respect of the swap pages for said external volatile memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.