Patent · US Active

System and method for faster interfaces on text-based tasks using adaptive memory networks

US10853575B2 · kind B2 · utility

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19Claims
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Key dates

Filing dateOct 25, 2018
Grant dateDec 1, 2020
Priority date
Expiry dateMar 15, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG08G5/56
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A method for performing question answer (QA) tasks that includes entering an input into an encoder portion of an adaptive memory network, wherein the encoder portion parses the input into entities of text for arrangement of memory banks. A bank controller of the adaptive memory network organizes the entities into progressively weighted banks within the arrangement of memory banks. The arrangement of memory banks may be arranged to have an initial memory bank having lowest relevance for lowest relevance entities being closest to the encoder, and a final memory bank having a highest relevance for highest relevance entities being closes to a decoder. The method may continue with inferring an answer for the question answer (QA) task with the decoder analyzing only the highest relevance entities in the final memory bank.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.