Power semiconductor device and power module
US10854537B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2018 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Sep 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/40245
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a small-sized power semiconductor device in which interference between power modules adjacently disposed is prevented and the areas of the gaps occurring between the power modules are reduced. In a power semiconductor device formed by adjacently disposing power modules in an arc shape on a heat sink, each of which power modules is obtained by sealing, with a mold resin, a switchable power semiconductor chip, a lead frame in which potential leads and signal terminals connected to the power semiconductor chip are formed, and a metallic inner lead electrically connecting an upper surface electrode of the power semiconductor chip and the lead frame, any one of the adjacent power modules is formed in a pentagonal shape having, at a portion adjacent to the other power module, an oblique side 10a obtained by cutting out one corner of a quadrangle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.