Semiconductor device packaging with metallic shielding layer
US10854557B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 19, 2016 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Jun 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/97
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: an island that is formed by a metallic layer including a single metallic layer or a plurality of different metallic layers; a semiconductor chip provided upon an upper surface of the island, and having a pair of side portions mutually opposing each other; a plurality of signal terminals disposed at an external periphery of at least the pair of side portions of the semiconductor chip, and formed by the metallic layer; a grounding terminal disposed at an external periphery of the plurality of signal terminals, and formed by the metallic layer; electrically conductive connection members that are connected between each of a plurality of electrodes of the semiconductor chip and each of the plurality of signal terminals; sealing resin that seals the island, the semiconductor chip, the electrically conductive connection members, the plurality of signal terminals, and the grounding terminal, so that a lower surface of the island, lower surfaces of the plurality of signal terminals, and a lower surface of the grounding terminal are exposed to the exterior; and a metallic shielding layer that covers over an outer peripheral side surface and an supper surface …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.