Patent · US Active

Semiconductor structure and fabrication method thereof

US10854558B2 · kind B2 · utility

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20Claims
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Key dates

Filing dateFeb 26, 2019
Grant dateDec 1, 2020
Priority date
Expiry dateFeb 26, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/5283
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Semiconductor structures and fabrication methods are provided. An exemplary fabrication method includes providing a semiconductor substrate having at least a first region; forming a dielectric structure over the semiconductor substrate; forming a plurality of first openings in the dielectric structure in the first region by removing portions of the dielectric structure in the first region; forming a first barrier member in each of the plurality of first openings; forming second openings with sidewall surfaces exposing sidewall surfaces of the first barrier members by removing portions of the dielectric structure between adjacent first openings; and forming a second barrier member in each of the plurality of second openings.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.