Solar cell and method for manufacturing same
US10854767B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2016 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Jan 8, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
Abstract
The solar cell includes an n-type semiconductor layer and a p-type semiconductor layer on a first principal surface of a crystalline silicon substrate. The n-type semiconductor layer is provided so as to extend over a part on a p-type semiconductor layer-formed region provided with the p-type semiconductor layer, and a p-type semiconductor layer non-formed-region where the p-type semiconductor layer is not provided. In a region where the n-type semiconductor layer is provided on the p-type semiconductor layer, a protecting layer is between the p-type semiconductor layer and the n-type semiconductor layer. The protecting layer includes: an underlying protecting layer that is in contact with the p-type semiconductor layer; and an insulating layer that is on the underlying protecting layer. The underlying protecting layer includes an intrinsic silicon-based layer or an n-type silicon-based layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.