Adaptive equalizer for high speed serial data and related control method
US10855242B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2019 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Jul 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G2201/208
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An equalizer system includes at least one equalizer configured to equalize an input signal to generate an equalized input signal; a limiting amplifier coupled to the at least one equalizer, and configured to amplify the equalized input signal to a saturated level to generate an output signal; and a control circuit coupled to the at least one equalizer and the limiting amplifier, and configured to generate at least one control signal to the at least one equalizer according to the equalized input signal to adjust a peak gain of the at least one equalizer, wherein the peak gain of the at least one equalizer is at a Nyquist frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.