High-side gate driver for gallium nitride integrated circuits
US10855273B2 · kind B2 · utility
Inventors
Key dates
| Filing date | May 27, 2019 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | May 27, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1033
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A gate driver circuit for a gallium nitride (GaN) power transistor includes a RS-flipflop that receives a first pulse train at an S input terminal and a second pulse train at an R input terminal, and produces an output pulse train, and an amplifier that amplifies the output pulse train and produces a gate driver signal for the GaN power transistor. The RS-flipflop and the amplifier may be implemented together on a GaN monolithic integrated circuit, optionally together with the GaN power transistor. The GaN power transistor may be a high-side switch of a half-bridge circuit. The RS-flipflop may be implemented with enhancement mode and depletion mode GaN high electron mobility transistors (HEMTs). Embodiments avoid drawbacks of prior hybrid (e.g., silicon-GaN) approaches, such as parasitic inductances from bonding wires and on-board metal traces, especially at high operating frequencies, as well as reduce implementation cost and improve performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.