Delay masking action for memory access requests
US10860215B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2018 |
| Grant date | Dec 8, 2020 |
| Priority date | — |
| Expiry date | Feb 8, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/068
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus comprises control circuitry to control access to a memory implemented using a memory technology providing variable access latency. The control circuitry has request handling circuitry to identify an execution context switch comprising a transition from servicing memory access requests associated with a first execution context to servicing memory access requests associated with a second execution context. At least when the execution context switch meets a predetermined condition, a delay masking action is triggered to control subsequent memory access requests associated with the second execution context, for which the required data is already stored in the memory, to be serviced with a response delay which is independent of which addresses were accessed by the memory access requests associated with the first execution context. This can help guard against attacks which aim to exploit variation in response latency to gain insight into the addresses accessed by a victim execution context.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.