Memory cell write assist in response to voltage tracking of a replica circuit
US10861534B2 · kind B2 · utility
1Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2019 |
| Grant date | Dec 8, 2020 |
| Priority date | — |
| Expiry date | Mar 28, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The claimed subject matter relate to circuits and/or methods, which operate to introduce a variable delay in a write-assist signal to a write driver of an array of SRAM cells. Particularly, a variable delay may be introduced by way of a voltage tracking circuit, which may generate a trigger signal in response to a voltage signal from an array of access devices that replicate access devices of the array of SRAM cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.