Method of manufacturing a semiconductor device
US10861860B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2019 |
| Grant date | Dec 8, 2020 |
| Priority date | — |
| Expiry date | Apr 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
Abstract
A semiconductor device includes a first active pattern and a second active pattern on a substrate, a first gate electrode and a second gate electrode respectively across the first active pattern and the second active pattern, a first insulation pattern between and separating the first and second gate electrodes, a gate spacer on a sidewall of the first gate electrode, on a sidewall of the second gate electrode, and on a sidewall of the first insulation pattern, and a second insulation pattern between the gate spacer and the sidewall of the first insulation pattern, wherein the first gate electrode, the first insulation pattern, and the second gate electrode are arranged along a first direction, and wherein the gate spacer extends in the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.