Electronic device and manufacturing method therefor
US10861880B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 22, 2018 |
| Grant date | Dec 8, 2020 |
| Priority date | — |
| Expiry date | Oct 22, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/481
Abstract
An electronic device has a multilayer structure including a plurality of wires in multiple layers, and a conductive material on a surface of the multilayer structure for electrically connecting two or more wires included in the plurality of wires. The surface of the multilayer structure has a first recess. The conductive material is in the first recess and on the surface of the multilayer structure. The conductive material has an upper surface. The upper surface has a second recess corresponding to the first recess. The second recess has a bottom surface at a higher position than an upper surface of the uppermost layer of the two or more wires.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.