Asymmetric Doherty amplifier with complex combining load matching circuit
US10862434B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 29, 2019 |
| Grant date | Dec 8, 2020 |
| Priority date | — |
| Expiry date | Oct 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00286
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Doherty power amplifier includes input circuitry that provides input signals to asymmetric carrier and peaking amplifiers (e.g., a peaking-to-carrier size ratio, α is greater than 1.15) with an absolute value of an input phase offset between 15 degrees and 165 degrees or between 195 degrees and 345 degrees. Carrier and peaking amplifier output signals are combined at a combining node. A complex combining load matching circuit, which is connected to the combining node, provides a complex impedance, ZL, with a non-zero reactive portion, xn. The output circuit between the peaking amplifier and the combining node has an electrical length of 0 or n*180 degrees (n=an integer value). The output circuit between the carrier amplifier and the combining node has an electrical length, θx, where a difference between the electrical lengths of the peaking output circuit and the carrier output circuit is equal to the input phase offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.