Low power dissipation high performance Class-D amplifier
US10862442B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2018 |
| Grant date | Dec 8, 2020 |
| Priority date | — |
| Expiry date | Mar 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45528
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a Class-D amplifier, first/second ratios and first/second RC time constants are sequentially matched by trimming. An integrator is coupled to differential first/second paths. The first/second ratios are of a feedback resistor to an input resistor in the first/second paths. R's of the first/second RC time constants are the resistors of the first/second matched ratios. C's of the first/second RC time constants are integrating capacitors in the first/second path. For each of multiple power rails, a ramp amplitude is determined based on a sensed voltage. Concurrently, the driver stage is switched from first to second power rails and quantizer switched from first to second ramp amplitudes to achieve constant combined quantizer/driver stage gain. Based on a sensed load current, an IR drop is determined for a respective output impedance of the driver stage and added to a loop filter output to compensate for the respective output impedance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.