Data processing unit having hardware-based parallel variable-length codeword decoding
US10862513B2 · kind B2 · utility
3Cited by
3References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2019 |
| Grant date | Dec 8, 2020 |
| Priority date | — |
| Expiry date | Feb 8, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6318
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A highly programmable device, referred to generally as a data processing unit, having multiple processing units for processing streams of information, such as network packets or storage packets, is described. The data processing unit includes one or more specialized hardware accelerators configured to perform acceleration for various data-processing functions. This disclosure describes a parallel decoding of codewords within input data stream based on a codeword type and position.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.