Increasing performance of a receive pipeline of a radar with memory optimization
US10866306B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2018 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | Mar 14, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/724
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A radar sensing system for a vehicle includes transmitters, receivers, a memory, and a processor. The transmitters transmit radio signals and the receivers receive reflected radio signals. The processor produces samples by correlating reflected radio signals with time-delayed replicas of transmitted radio signals. The processor stores this information as a first radar data cube (RDC), with information related to signals reflected from objects as a function of time (one of the dimensions) at various distances (a second dimension) for various receivers (a third dimension). The first RDC is processed to compute velocity and angle estimates, which are stored in a second RDC and a third RDC, respectively. One or more memory optimizations are used to increase performance. Before storing the second RDC and the third RDC in an internal/external memory, the second and third RDCs are sparsified to only include the outputs in specific regions of interest.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.