Ultra-low power consumption power supply structure
US10866605B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2018 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | May 22, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An ultra-low power consumption power supply structure, comprising: a first LDO circuit, a second LDO circuit, a first Bandgap module, a second Bandgap module and a switching circuit, wherein the first LDO circuit is used for providing an LDO output voltage when an SOC chip is in a normal operating mode, and the second LDO circuit is used for providing an LDO output voltage when the SOC chip is in an ultra-low power consumption mode; the first Bandgap module is used for providing, based on a main power supply voltage, a first reference voltage for the first LDO circuit at the time of power-on startup, and the second Bandgap module is used for providing a second reference voltage for the second LDO circuit after power-on startup is completed; and the switching circuit is used for switching the mode in which the first reference voltage is output by the first Bandgap module at the time of power-on startup to the mode in which the second reference voltage is output by the second Bandgap module after power-on startup is completed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.