Patent · US Active

Method and apparatus for implementing lock-free data structures

US10866890B2 · kind B2 · utility

1Cited by
0References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 7, 2018
Grant dateDec 15, 2020
Priority date
Expiry dateFeb 23, 2039

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F2212/205
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An instruction set architecture of a data processing system includes one or more persistent atomic instructions that provide failure-safe atomicity. When issued, a sequence of operations associated with the persistent atomic instruction are performed and first data, associated with a first address in a persistent memory of the data processing system, is written to a point of persistence in the data processing system. Access to data associated with the first address is controlled such that the first data is not available to other execution threads of the data processing system until completion of writing the first data to the point of persistence. The point of persistence may be the persistent memory itself or a persist buffer. The persist buffer may be a volatile or non-volatile buffer. One or more monitors may control access to data at memory addresses dependent upon a designated state of exclusivity.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.