Semiconductor quantum structures using preferential tunneling through thin insulator layers
US10868119B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 20, 2020 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | Jan 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/211
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Novel and useful semiconductor structures using preferential tunneling through thin insulator layers. Semiconductor quantum structures are implemented using tunneling through a thin oxide layer. The quantum dots are fabricated with semiconductor wells, 3D fins or combinations thereof, while the tunneling path and any optional quantum transport path is implemented with gate layers. The oxide layer between the gate and the well is thin enough in the nanometer semiconductor processes to permit significant tunneling. Having a thin oxide layer on only one side of the well, while having thick oxide layers on all other sides, results in a preferential tunneling direction where tunneling is restricted to a small area resulting in aperture tunneling. The advantage being constraining quantum transport to a very narrow path, which can be approximated as unidimensional. In alternative embodiments, more than one preferential tunneling direction may be used. These techniques can be used in both planar and 3D (e.g., FinFET) semiconductor processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.