Supply voltage and temperature independent receiver
US10868537B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2020 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | Jul 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L13/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments relate to a circuitry for digital data communication. The circuitry includes an inverter circuit connected between an input node and an output node. The inverter circuit has core circuits each of which includes a complementary metal-oxide-semiconductor (CMOS) transistor of a first type and a CMOS transistor of a second type having a first common gate node connected to the input node and a first common drain node connected to the output node. The circuitry further includes another inverter circuit of a switching threshold voltage different than that of the inverter circuit and connected between the input node and the output node. The other inverter circuit has core circuits each of which includes a CMOS transistor of a third type and a CMOS transistor of a fourth type having a second common gate node connected to the input node and a second common drain node connected to the output node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.