Virtualized synchronous Ethernet interfaces
US10868662B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2018 |
| Grant date | Dec 15, 2020 |
| Priority date | — |
| Expiry date | Nov 30, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0658
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Virtualized Synchronous Ethernet systems and methods include, in a network element supporting a plurality of slices over a common Ethernet physical (PHY) connection, determining a common PHY frequency; for a specific slice of the plurality of slices, obtaining a bit-level accurate count (Cn) over a accumulation window; and determining a client clock for the specific slice based on the common PHY frequency and the bit-level accurate count (Cn). The systems and methods can include receiving the bit-level accurate count (Cn) from a second network element for synchronization therewith. The bit-level accurate count (Cn) over the given accumulation window can be determined utilizing accumulators and the client clock can be determined utilizing Digital Phase Lock Loops (DPLLs).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.